1471 lines
128 KiB
Plaintext
1471 lines
128 KiB
Plaintext
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(kicad_pcb (version 20171130) (host pcbnew "(5.1.8)-1")
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(general
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(thickness 1.6)
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(drawings 16)
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(tracks 228)
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(zones 0)
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(modules 5)
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(nets 57)
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)
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(page A4)
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(title_block
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(title "RCEU2364 C128 64KB VRAM")
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(date 2021-02-03)
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(rev v1.2)
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(company https://retro-commodore.eu)
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(comment 3 "Copyright (c) 2018-2021")
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(comment 4 "by Tomse")
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)
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(layers
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(0 Top signal)
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(31 Bottom signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(scaleselection 1)
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(outputdirectory "../Gerber/RCEU2364-C128-64KB-VRAM_V1.2/"))
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)
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(net 0 "")
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(net 1 VCC)
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(net 2 GND)
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(net 15 /DA2)
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(net 16 /DA1)
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(net 17 /DA0)
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(net 18 /LPEN)
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(net 22 /DR/~W)
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(net 23 /VSYNC)
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(net 24 /DISPEN)
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(net 25 /D0)
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(net 26 /D1)
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(net 27 /D2)
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(net 28 /D3)
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(net 29 /D4)
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(net 30 /D5)
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(net 31 /D6)
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(net 32 /D7)
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(net 34 /~RS)
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(net 35 /~CS)
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(net 36 /N/C)
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(net 37 /NC)
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(net 38 /CS)
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(net 39 /HSYNC)
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(net 40 /~DCLK)
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(net 41 /CCLK)
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(net 42 "Net-(IC2-Pad42)")
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(net 43 "Net-(IC2-Pad41)")
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(net 44 "Net-(IC2-Pad40)")
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(net 45 "Net-(IC2-Pad39)")
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(net 46 "Net-(IC2-Pad38)")
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(net 47 "Net-(IC2-Pad36)")
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(net 48 "Net-(IC2-Pad35)")
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(net 49 "Net-(IC2-Pad34)")
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(net 50 /DD7)
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(net 51 /DD6)
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(net 52 /DD5)
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(net 53 /DD4)
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(net 54 /DD3)
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(net 55 /DD1)
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(net 56 /DD0)
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(net_class Default "This is the default net class."
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(clearance 0.1524)
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(trace_width 0.25)
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(via_dia 0.8)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net /B)
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(add_net /CCLK)
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(add_net /CS)
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(add_net /D0)
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(add_net /D1)
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(add_net /D2)
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(add_net /D3)
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(add_net /D4)
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(add_net /D5)
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(add_net /D6)
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(add_net /D7)
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(add_net /DA0)
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(add_net /DA1)
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(add_net /DA2)
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(add_net /DA3)
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(add_net /DA4)
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(add_net /DA5)
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(add_net /DA6)
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(add_net /DA7)
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(add_net /DD0)
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(add_net /DD1)
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(add_net /DD2)
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(add_net /DD4)
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(add_net /DD5)
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(add_net /DD6)
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(add_net /DD7)
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(add_net /DISPEN)
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(add_net /DR/~W)
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(add_net /G)
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(add_net /HSYNC)
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(add_net /I)
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(add_net /INIT)
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(add_net /LPEN)
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(add_net /N/C)
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(add_net /NC)
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(add_net /R)
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(add_net /R/~W)
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(add_net /TEST)
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(add_net /VSYNC)
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(add_net /~CAS)
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(add_net /~CS)
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(add_net /~DCLK)
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(add_net /~RAS)
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(add_net /~RES)
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(add_net /~RS)
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(add_net "Net-(IC2-Pad34)")
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(add_net "Net-(IC2-Pad35)")
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(add_net "Net-(IC2-Pad36)")
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(add_net "Net-(IC2-Pad38)")
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(add_net "Net-(IC2-Pad39)")
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(add_net "Net-(IC2-Pad40)")
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(add_net "Net-(IC2-Pad41)")
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(add_net "Net-(IC2-Pad42)")
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)
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(net_class Power ""
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(uvia_drill 0.1)
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(add_net GND)
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(add_net VCC)
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)
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(module C128-VRAM-64K-Expansion:MOS8563 (layer Top) (tedit 0) (tstamp 5FD29BA5)
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(at 138.5 105 270)
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(descr "<b>Dual In Line Package</b>")
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(path /22F7723E)
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(fp_text reference IC1 (at -24.2536 0.12 270) (layer F.SilkS) hide
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(effects (font (size 1.6891 1.6891) (thickness 0.16891)) (justify left bottom))
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(fp_text value MOS8563 (at -23.25 2.5 270 unlocked) (layer F.SilkS)
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(effects (font (size 1.6891 1.6891) (thickness 0.16891)) (justify left bottom))
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)
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(net 3 /~CAS) (solder_mask_margin 0.1016))
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||
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||
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||
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||
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||
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||
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||
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||
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|
||
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|
||
|
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|
||
|
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||
|
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|
||
|
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|
||
|
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|
||
|
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||
|
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||
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||
|
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||
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||
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||
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||
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||
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||
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||
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||
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||
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||
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(net 23 /VSYNC) (solder_mask_margin 0.1016))
|
||
|
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||
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|
||
|
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||
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(net 25 /D0) (solder_mask_margin 0.1016))
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||
|
(pad 17 thru_hole oval (at 11.43 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
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||
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(net 26 /D1) (solder_mask_margin 0.1016))
|
||
|
(pad 16 thru_hole oval (at 8.89 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
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||
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(net 27 /D2) (solder_mask_margin 0.1016))
|
||
|
(pad 15 thru_hole oval (at 6.35 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
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||
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(net 28 /D3) (solder_mask_margin 0.1016))
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||
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(pad 14 thru_hole oval (at 3.81 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
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||
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(net 29 /D4) (solder_mask_margin 0.1016))
|
||
|
(pad 13 thru_hole oval (at 1.27 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
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||
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(net 30 /D5) (solder_mask_margin 0.1016))
|
||
|
(pad 12 thru_hole oval (at -1.27 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
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(net 2 GND) (solder_mask_margin 0.1016))
|
||
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(pad 11 thru_hole oval (at -3.81 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
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(net 31 /D6) (solder_mask_margin 0.1016))
|
||
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(pad 10 thru_hole oval (at -6.35 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 32 /D7) (solder_mask_margin 0.1016))
|
||
|
(pad 9 thru_hole oval (at -8.89 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 33 /R/~W) (solder_mask_margin 0.1016))
|
||
|
(pad 8 thru_hole oval (at -11.43 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 34 /~RS) (solder_mask_margin 0.1016))
|
||
|
(pad 7 thru_hole oval (at -13.97 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 35 /~CS) (solder_mask_margin 0.1016))
|
||
|
(pad 6 thru_hole oval (at -16.51 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 36 /N/C) (solder_mask_margin 0.1016))
|
||
|
(pad 5 thru_hole oval (at -19.05 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 37 /NC) (solder_mask_margin 0.1016))
|
||
|
(pad 4 thru_hole oval (at -21.59 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 38 /CS) (solder_mask_margin 0.1016))
|
||
|
(pad 3 thru_hole oval (at -24.13 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 39 /HSYNC) (solder_mask_margin 0.1016))
|
||
|
(pad 2 thru_hole oval (at -26.67 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 40 /~DCLK) (solder_mask_margin 0.1016))
|
||
|
(pad 1 thru_hole oval (at -29.21 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 41 /CCLK) (solder_mask_margin 0.1016))
|
||
|
(model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-48_W15.24mm_Socket.step
|
||
|
(offset (xyz -29.2 -7.6 0))
|
||
|
(scale (xyz 1 1 1))
|
||
|
(rotate (xyz 0 0 -90))
|
||
|
)
|
||
|
)
|
||
|
|
||
|
(module C128-VRAM-64K-Expansion:DIL48 (layer Top) (tedit 5FD29BDE) (tstamp 5FD29BDE)
|
||
|
(at 134.75 105.0036 270)
|
||
|
(descr "<b>Dual In Line Package</b>")
|
||
|
(path /BC34DC86)
|
||
|
(fp_text reference IC2 (at -30.226 6.35) (layer F.SilkS) hide
|
||
|
(effects (font (size 1.6891 1.6891) (thickness 0.16891)) (justify left bottom))
|
||
|
)
|
||
|
(fp_text value DIL48 (at -16.637 1.016 270) (layer F.Fab)
|
||
|
(effects (font (size 1.6891 1.6891) (thickness 0.16891)) (justify right bottom))
|
||
|
)
|
||
|
(pad 48 thru_hole oval (at -29.21 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 3 /~CAS) (solder_mask_margin 0.1016))
|
||
|
(pad 47 thru_hole oval (at -26.67 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 4 /~RAS) (solder_mask_margin 0.1016))
|
||
|
(pad 46 thru_hole oval (at -24.13 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 5 /R) (solder_mask_margin 0.1016))
|
||
|
(pad 45 thru_hole oval (at -21.59 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 6 /G) (solder_mask_margin 0.1016))
|
||
|
(pad 44 thru_hole oval (at -19.05 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 7 /B) (solder_mask_margin 0.1016))
|
||
|
(pad 43 thru_hole oval (at -16.51 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 8 /I) (solder_mask_margin 0.1016))
|
||
|
(pad 42 thru_hole oval (at -13.97 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 42 "Net-(IC2-Pad42)") (solder_mask_margin 0.1016))
|
||
|
(pad 41 thru_hole oval (at -11.43 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 43 "Net-(IC2-Pad41)") (solder_mask_margin 0.1016))
|
||
|
(pad 40 thru_hole oval (at -8.89 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 44 "Net-(IC2-Pad40)") (solder_mask_margin 0.1016))
|
||
|
(pad 39 thru_hole oval (at -6.35 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 45 "Net-(IC2-Pad39)") (solder_mask_margin 0.1016))
|
||
|
(pad 38 thru_hole oval (at -3.81 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 46 "Net-(IC2-Pad38)") (solder_mask_margin 0.1016))
|
||
|
(pad 37 thru_hole oval (at -1.27 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 1 VCC) (solder_mask_margin 0.1016))
|
||
|
(pad 36 thru_hole oval (at 1.27 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 47 "Net-(IC2-Pad36)") (solder_mask_margin 0.1016))
|
||
|
(pad 35 thru_hole oval (at 3.81 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 48 "Net-(IC2-Pad35)") (solder_mask_margin 0.1016))
|
||
|
(pad 34 thru_hole oval (at 6.35 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 49 "Net-(IC2-Pad34)") (solder_mask_margin 0.1016))
|
||
|
(pad 33 thru_hole oval (at 8.89 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 10 /DA7) (solder_mask_margin 0.1016))
|
||
|
(pad 32 thru_hole oval (at 11.43 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 11 /DA6) (solder_mask_margin 0.1016))
|
||
|
(pad 31 thru_hole oval (at 13.97 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 12 /DA5) (solder_mask_margin 0.1016))
|
||
|
(pad 30 thru_hole oval (at 16.51 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 13 /DA4) (solder_mask_margin 0.1016))
|
||
|
(pad 29 thru_hole oval (at 19.05 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 14 /DA3) (solder_mask_margin 0.1016))
|
||
|
(pad 28 thru_hole oval (at 21.59 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 15 /DA2) (solder_mask_margin 0.1016))
|
||
|
(pad 27 thru_hole oval (at 24.13 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 16 /DA1) (solder_mask_margin 0.1016))
|
||
|
(pad 26 thru_hole oval (at 26.67 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 17 /DA0) (solder_mask_margin 0.1016))
|
||
|
(pad 25 thru_hole oval (at 29.21 -7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 18 /LPEN) (solder_mask_margin 0.1016))
|
||
|
(pad 24 thru_hole oval (at 29.21 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 19 /TEST) (solder_mask_margin 0.1016))
|
||
|
(pad 23 thru_hole oval (at 26.67 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 20 /~RES) (solder_mask_margin 0.1016))
|
||
|
(pad 22 thru_hole oval (at 24.13 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 21 /INIT) (solder_mask_margin 0.1016))
|
||
|
(pad 21 thru_hole oval (at 21.59 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 22 /DR/~W) (solder_mask_margin 0.1016))
|
||
|
(pad 20 thru_hole oval (at 19.05 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 23 /VSYNC) (solder_mask_margin 0.1016))
|
||
|
(pad 19 thru_hole oval (at 16.51 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 24 /DISPEN) (solder_mask_margin 0.1016))
|
||
|
(pad 18 thru_hole oval (at 13.97 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 25 /D0) (solder_mask_margin 0.1016))
|
||
|
(pad 17 thru_hole oval (at 11.43 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 26 /D1) (solder_mask_margin 0.1016))
|
||
|
(pad 16 thru_hole oval (at 8.89 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 27 /D2) (solder_mask_margin 0.1016))
|
||
|
(pad 15 thru_hole oval (at 6.35 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 28 /D3) (solder_mask_margin 0.1016))
|
||
|
(pad 14 thru_hole oval (at 3.81 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 29 /D4) (solder_mask_margin 0.1016))
|
||
|
(pad 13 thru_hole oval (at 1.27 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 30 /D5) (solder_mask_margin 0.1016))
|
||
|
(pad 12 thru_hole oval (at -1.27 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 2 GND) (solder_mask_margin 0.1016))
|
||
|
(pad 11 thru_hole oval (at -3.81 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 31 /D6) (solder_mask_margin 0.1016))
|
||
|
(pad 10 thru_hole oval (at -6.35 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 32 /D7) (solder_mask_margin 0.1016))
|
||
|
(pad 9 thru_hole oval (at -8.89 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 33 /R/~W) (solder_mask_margin 0.1016))
|
||
|
(pad 8 thru_hole oval (at -11.43 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 34 /~RS) (solder_mask_margin 0.1016))
|
||
|
(pad 7 thru_hole oval (at -13.97 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 35 /~CS) (solder_mask_margin 0.1016))
|
||
|
(pad 6 thru_hole oval (at -16.51 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 36 /N/C) (solder_mask_margin 0.1016))
|
||
|
(pad 5 thru_hole oval (at -19.05 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 37 /NC) (solder_mask_margin 0.1016))
|
||
|
(pad 4 thru_hole oval (at -21.59 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 38 /CS) (solder_mask_margin 0.1016))
|
||
|
(pad 3 thru_hole oval (at -24.13 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 39 /HSYNC) (solder_mask_margin 0.1016))
|
||
|
(pad 2 thru_hole oval (at -26.67 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 40 /~DCLK) (solder_mask_margin 0.1016))
|
||
|
(pad 1 thru_hole oval (at -29.21 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 41 /CCLK) (solder_mask_margin 0.1016))
|
||
|
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x24_P2.54mm_Vertical.step
|
||
|
(offset (xyz -29.2 -7.6 -2))
|
||
|
(scale (xyz 1 1 1))
|
||
|
(rotate (xyz 0 -180 -90))
|
||
|
)
|
||
|
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x24_P2.54mm_Vertical.step
|
||
|
(offset (xyz -29.2 7.6 -2))
|
||
|
(scale (xyz 1 1 1))
|
||
|
(rotate (xyz 0 -180 -90))
|
||
|
)
|
||
|
)
|
||
|
|
||
|
(module C128-VRAM-64K-Expansion:DIL18 (layer Top) (tedit 0) (tstamp 5FFBEE5C)
|
||
|
(at 154.94 122.7836 270)
|
||
|
(descr "<b>Dual In Line Package</b>")
|
||
|
(path /B686635D)
|
||
|
(fp_text reference IC3 (at -11.684 3.048) (layer F.SilkS) hide
|
||
|
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
|
||
|
)
|
||
|
(fp_text value 41464C (at -9.525 0.635 90) (layer F.Fab)
|
||
|
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|
||
|
)
|
||
|
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|
||
|
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|
||
|
(fp_line (start 11.43 -2.921) (end 11.43 2.921) (layer F.SilkS) (width 0.1524))
|
||
|
(fp_line (start -11.43 2.921) (end 11.43 2.921) (layer F.SilkS) (width 0.1524))
|
||
|
(fp_line (start 11.43 -2.921) (end -11.43 -2.921) (layer F.SilkS) (width 0.1524))
|
||
|
(fp_arc (start -11.43 0) (end -11.43 -1.016) (angle 180) (layer F.SilkS) (width 0.1524))
|
||
|
(pad 18 thru_hole oval (at -10.16 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 2 GND) (solder_mask_margin 0.1016))
|
||
|
(pad 17 thru_hole oval (at -7.62 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
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(net 54 /DD3) (solder_mask_margin 0.1016))
|
||
|
(pad 16 thru_hole oval (at -5.08 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 3 /~CAS) (solder_mask_margin 0.1016))
|
||
|
(pad 15 thru_hole oval (at -2.54 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 56 /DD0) (solder_mask_margin 0.1016))
|
||
|
(pad 14 thru_hole oval (at 0 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 10 /DA7) (solder_mask_margin 0.1016))
|
||
|
(pad 13 thru_hole oval (at 2.54 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 11 /DA6) (solder_mask_margin 0.1016))
|
||
|
(pad 12 thru_hole oval (at 5.08 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 13 /DA4) (solder_mask_margin 0.1016))
|
||
|
(pad 11 thru_hole oval (at 7.62 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 15 /DA2) (solder_mask_margin 0.1016))
|
||
|
(pad 10 thru_hole oval (at 10.16 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 17 /DA0) (solder_mask_margin 0.1016))
|
||
|
(pad 9 thru_hole oval (at 10.16 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 1 VCC) (solder_mask_margin 0.1016))
|
||
|
(pad 5 thru_hole oval (at 0 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
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(net 4 /~RAS) (solder_mask_margin 0.1016))
|
||
|
(pad 6 thru_hole oval (at 2.54 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
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(net 12 /DA5) (solder_mask_margin 0.1016))
|
||
|
(pad 4 thru_hole oval (at -2.54 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
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(net 22 /DR/~W) (solder_mask_margin 0.1016))
|
||
|
(pad 3 thru_hole oval (at -5.08 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
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(net 55 /DD1) (solder_mask_margin 0.1016))
|
||
|
(pad 8 thru_hole oval (at 7.62 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
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(net 16 /DA1) (solder_mask_margin 0.1016))
|
||
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(pad 7 thru_hole oval (at 5.08 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
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(net 14 /DA3) (solder_mask_margin 0.1016))
|
||
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(pad 2 thru_hole oval (at -7.62 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
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(net 9 /DD2) (solder_mask_margin 0.1016))
|
||
|
(pad 1 thru_hole oval (at -10.16 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
|
||
|
(net 2 GND) (solder_mask_margin 0.1016))
|
||
|
(model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-18_W7.62mm.step
|
||
|
(offset (xyz -10.2 -3.8 0))
|
||
|
(scale (xyz 1 1 1))
|
||
|
(rotate (xyz 0 0 -90))
|
||
|
)
|
||
|
)
|
||
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|
||
|
(module C128-VRAM-64K-Expansion:C5B2.5 (layer Top) (tedit 0) (tstamp 5FD29B92)
|
||
|
(at 160.25 108.5 180)
|
||
|
(descr "<B>MKS2</B>, 7.5 x 2.5 mm, grid 5.08 mm")
|
||
|
(path /65963FEF)
|
||
|
(fp_text reference C1 (at -2.032 -1.524) (layer F.SilkS) hide
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)
|
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(fp_text value 22nF (at -2.5 1.5) (layer F.SilkS)
|
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)
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