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73bb20d7ba
RCEU2364-C128-64KB-VRAM/Schematic/C128-VRAM-64K-Expansion.kicad_pcb
tomse 73bb20d7ba v1.2
2021-04-20 08:38:46 +02:00

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(page A4)
(title_block
(title "RCEU2364 C128 64KB VRAM")
(date 2021-02-03)
(rev v1.2)
(company https://retro-commodore.eu)
(comment 3 "Copyright (c) 2018-2021")
(comment 4 "by Tomse")
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(net 22 /DR/~W) (solder_mask_margin 0.1016))
(pad 20 thru_hole oval (at 19.05 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 23 /VSYNC) (solder_mask_margin 0.1016))
(pad 19 thru_hole oval (at 16.51 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 24 /DISPEN) (solder_mask_margin 0.1016))
(pad 18 thru_hole oval (at 13.97 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 25 /D0) (solder_mask_margin 0.1016))
(pad 17 thru_hole oval (at 11.43 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 26 /D1) (solder_mask_margin 0.1016))
(pad 16 thru_hole oval (at 8.89 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 27 /D2) (solder_mask_margin 0.1016))
(pad 15 thru_hole oval (at 6.35 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 28 /D3) (solder_mask_margin 0.1016))
(pad 14 thru_hole oval (at 3.81 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 29 /D4) (solder_mask_margin 0.1016))
(pad 13 thru_hole oval (at 1.27 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 30 /D5) (solder_mask_margin 0.1016))
(pad 12 thru_hole oval (at -1.27 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 2 GND) (solder_mask_margin 0.1016))
(pad 11 thru_hole oval (at -3.81 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 31 /D6) (solder_mask_margin 0.1016))
(pad 10 thru_hole oval (at -6.35 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 32 /D7) (solder_mask_margin 0.1016))
(pad 9 thru_hole oval (at -8.89 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 33 /R/~W) (solder_mask_margin 0.1016))
(pad 8 thru_hole oval (at -11.43 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 34 /~RS) (solder_mask_margin 0.1016))
(pad 7 thru_hole oval (at -13.97 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 35 /~CS) (solder_mask_margin 0.1016))
(pad 6 thru_hole oval (at -16.51 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 36 /N/C) (solder_mask_margin 0.1016))
(pad 5 thru_hole oval (at -19.05 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 37 /NC) (solder_mask_margin 0.1016))
(pad 4 thru_hole oval (at -21.59 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 38 /CS) (solder_mask_margin 0.1016))
(pad 3 thru_hole oval (at -24.13 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 39 /HSYNC) (solder_mask_margin 0.1016))
(pad 2 thru_hole oval (at -26.67 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 40 /~DCLK) (solder_mask_margin 0.1016))
(pad 1 thru_hole oval (at -29.21 7.62) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 41 /CCLK) (solder_mask_margin 0.1016))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x24_P2.54mm_Vertical.step
(offset (xyz -29.2 -7.6 -2))
(scale (xyz 1 1 1))
(rotate (xyz 0 -180 -90))
)
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x24_P2.54mm_Vertical.step
(offset (xyz -29.2 7.6 -2))
(scale (xyz 1 1 1))
(rotate (xyz 0 -180 -90))
)
)
(module C128-VRAM-64K-Expansion:DIL18 (layer Top) (tedit 0) (tstamp 5FFBEE5C)
(at 154.94 122.7836 270)
(descr "<b>Dual In Line Package</b>")
(path /B686635D)
(fp_text reference IC3 (at -11.684 3.048) (layer F.SilkS) hide
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
)
(fp_text value 41464C (at -9.525 0.635 90) (layer F.Fab)
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
)
(fp_line (start -11.43 2.921) (end -11.43 1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start -11.43 -2.921) (end -11.43 -1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start 11.43 -2.921) (end 11.43 2.921) (layer F.SilkS) (width 0.1524))
(fp_line (start -11.43 2.921) (end 11.43 2.921) (layer F.SilkS) (width 0.1524))
(fp_line (start 11.43 -2.921) (end -11.43 -2.921) (layer F.SilkS) (width 0.1524))
(fp_arc (start -11.43 0) (end -11.43 -1.016) (angle 180) (layer F.SilkS) (width 0.1524))
(pad 18 thru_hole oval (at -10.16 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 2 GND) (solder_mask_margin 0.1016))
(pad 17 thru_hole oval (at -7.62 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 54 /DD3) (solder_mask_margin 0.1016))
(pad 16 thru_hole oval (at -5.08 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 3 /~CAS) (solder_mask_margin 0.1016))
(pad 15 thru_hole oval (at -2.54 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 56 /DD0) (solder_mask_margin 0.1016))
(pad 14 thru_hole oval (at 0 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 10 /DA7) (solder_mask_margin 0.1016))
(pad 13 thru_hole oval (at 2.54 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 11 /DA6) (solder_mask_margin 0.1016))
(pad 12 thru_hole oval (at 5.08 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 13 /DA4) (solder_mask_margin 0.1016))
(pad 11 thru_hole oval (at 7.62 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 15 /DA2) (solder_mask_margin 0.1016))
(pad 10 thru_hole oval (at 10.16 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 17 /DA0) (solder_mask_margin 0.1016))
(pad 9 thru_hole oval (at 10.16 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 1 VCC) (solder_mask_margin 0.1016))
(pad 5 thru_hole oval (at 0 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 4 /~RAS) (solder_mask_margin 0.1016))
(pad 6 thru_hole oval (at 2.54 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 12 /DA5) (solder_mask_margin 0.1016))
(pad 4 thru_hole oval (at -2.54 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 22 /DR/~W) (solder_mask_margin 0.1016))
(pad 3 thru_hole oval (at -5.08 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 55 /DD1) (solder_mask_margin 0.1016))
(pad 8 thru_hole oval (at 7.62 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 16 /DA1) (solder_mask_margin 0.1016))
(pad 7 thru_hole oval (at 5.08 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 14 /DA3) (solder_mask_margin 0.1016))
(pad 2 thru_hole oval (at -7.62 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 9 /DD2) (solder_mask_margin 0.1016))
(pad 1 thru_hole oval (at -10.16 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 2 GND) (solder_mask_margin 0.1016))
(model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-18_W7.62mm.step
(offset (xyz -10.2 -3.8 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 -90))
)
)
(module C128-VRAM-64K-Expansion:C5B2.5 (layer Top) (tedit 0) (tstamp 5FD29B92)
(at 160.25 108.5 180)
(descr "<B>MKS2</B>, 7.5 x 2.5 mm, grid 5.08 mm")
(path /65963FEF)
(fp_text reference C1 (at -2.032 -1.524) (layer F.SilkS) hide
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify right bottom))
)
(fp_text value 22nF (at -2.5 1.5) (layer F.SilkS)
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify right bottom))
)
(fp_line (start 3.429 -1.27) (end -3.429 -1.27) (layer F.SilkS) (width 0.1524))
(fp_line (start 3.683 1.016) (end 3.683 -1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start -3.429 1.27) (end 3.429 1.27) (layer F.SilkS) (width 0.1524))
(fp_line (start -3.683 -1.016) (end -3.683 1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start 0.3302 0) (end 1.524 0) (layer F.SilkS) (width 0.1524))
(fp_line (start 0.3302 0) (end 0.3302 0.635) (layer F.SilkS) (width 0.3048))
(fp_line (start 0.3302 -0.635) (end 0.3302 0) (layer F.SilkS) (width 0.3048))
(fp_line (start -0.3048 0) (end -1.524 0) (layer F.SilkS) (width 0.1524))
(fp_line (start -0.3048 0) (end -0.3048 0.635) (layer F.SilkS) (width 0.3048))
(fp_line (start -0.3048 -0.635) (end -0.3048 0) (layer F.SilkS) (width 0.3048))
(fp_arc (start -3.429 -1.016) (end -3.683 -1.016) (angle 90) (layer F.SilkS) (width 0.1524))
(fp_arc (start -3.429 1.016) (end -3.683 1.016) (angle -90) (layer F.SilkS) (width 0.1524))
(fp_arc (start 3.429 1.016) (end 3.429 1.27) (angle -90) (layer F.SilkS) (width 0.1524))
(fp_arc (start 3.429 -1.016) (end 3.429 -1.27) (angle 90) (layer F.SilkS) (width 0.1524))
(pad 2 thru_hole circle (at 2.54 0 180) (size 1.6002 1.6002) (drill 0.8128) (layers *.Cu *.Mask)
(net 2 GND) (solder_mask_margin 0.1016))
(pad 1 thru_hole circle (at -2.54 0 180) (size 1.6002 1.6002) (drill 0.8128) (layers *.Cu *.Mask)
(net 1 VCC) (solder_mask_margin 0.1016))
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D4.3mm_W1.9mm_P5.00mm.step
(offset (xyz -2.5 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module C128-VRAM-64K-Expansion:DIL18 (layer Top) (tedit 0) (tstamp 5FD29C32)
(at 166.37 122.7836 270)
(descr "<b>Dual In Line Package</b>")
(path /FA55F29D)
(fp_text reference IC4 (at -11.684 3.048) (layer F.SilkS) hide
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
)
(fp_text value 41464C (at -9.525 0.635 90) (layer F.Fab)
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
)
(fp_line (start -11.43 2.921) (end -11.43 1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start -11.43 -2.921) (end -11.43 -1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start 11.43 -2.921) (end 11.43 2.921) (layer F.SilkS) (width 0.1524))
(fp_line (start -11.43 2.921) (end 11.43 2.921) (layer F.SilkS) (width 0.1524))
(fp_line (start 11.43 -2.921) (end -11.43 -2.921) (layer F.SilkS) (width 0.1524))
(fp_arc (start -11.43 0) (end -11.43 -1.016) (angle 180) (layer F.SilkS) (width 0.1524))
(pad 18 thru_hole oval (at -10.16 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 2 GND) (solder_mask_margin 0.1016))
(pad 17 thru_hole oval (at -7.62 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 50 /DD7) (solder_mask_margin 0.1016))
(pad 16 thru_hole oval (at -5.08 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 3 /~CAS) (solder_mask_margin 0.1016))
(pad 15 thru_hole oval (at -2.54 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 53 /DD4) (solder_mask_margin 0.1016))
(pad 14 thru_hole oval (at 0 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 10 /DA7) (solder_mask_margin 0.1016))
(pad 13 thru_hole oval (at 2.54 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 11 /DA6) (solder_mask_margin 0.1016))
(pad 12 thru_hole oval (at 5.08 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 13 /DA4) (solder_mask_margin 0.1016))
(pad 11 thru_hole oval (at 7.62 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 15 /DA2) (solder_mask_margin 0.1016))
(pad 10 thru_hole oval (at 10.16 -3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 17 /DA0) (solder_mask_margin 0.1016))
(pad 9 thru_hole oval (at 10.16 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 1 VCC) (solder_mask_margin 0.1016))
(pad 5 thru_hole oval (at 0 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 4 /~RAS) (solder_mask_margin 0.1016))
(pad 6 thru_hole oval (at 2.54 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 12 /DA5) (solder_mask_margin 0.1016))
(pad 4 thru_hole oval (at -2.54 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 22 /DR/~W) (solder_mask_margin 0.1016))
(pad 3 thru_hole oval (at -5.08 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 52 /DD5) (solder_mask_margin 0.1016))
(pad 8 thru_hole oval (at 7.62 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 16 /DA1) (solder_mask_margin 0.1016))
(pad 7 thru_hole oval (at 5.08 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 14 /DA3) (solder_mask_margin 0.1016))
(pad 2 thru_hole oval (at -7.62 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 51 /DD6) (solder_mask_margin 0.1016))
(pad 1 thru_hole oval (at -10.16 3.81) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(net 2 GND) (solder_mask_margin 0.1016))
(model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-18_W7.62mm.step
(offset (xyz -10.2 -3.8 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 -90))
)
)
(gr_text "4464 / 41464" (at 166 123.25 270) (layer F.SilkS) (tstamp 5FFBE749)
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