RCEU/RCEU2364-C128-64KB-VRAM
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v1.2

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tomse
2021-04-20 08:38:46 +02:00
parent 270d7ce18b
commit 73bb20d7ba
14 changed files with 3348 additions and 0 deletions
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213
Schematic/C128-VRAM-64K-Expansion-cache.lib Normal file
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# C128-VRAM-64K-Expansion-rescue_41464C-C128-VRAM-64K-Expansion-eagle-import
#
DEF C128-VRAM-64K-Expansion-rescue_41464C-C128-VRAM-64K-Expansion-eagle-import IC 0 40 Y Y 1 L N
F0 "IC" -300 625 59 H V L BNN
F1 "C128-VRAM-64K-Expansion-rescue_41464C-C128-VRAM-64K-Expansion-eagle-import" -300 -900 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -300 -800 -300 600 N
P 2 1 0 0 -300 -800 400 -800 N
P 2 1 0 0 400 600 -300 600 N
P 2 1 0 0 400 600 400 -800 N
X ~OE 1 -500 -500 200 R 50 50 1 0 I
X A7 10 -500 -200 200 R 50 50 1 0 I
X A3 11 -500 200 200 R 50 50 1 0 I
X A2 12 -500 300 200 R 50 50 1 0 I
X A1 13 -500 400 200 R 50 50 1 0 I
X A0 14 -500 500 200 R 50 50 1 0 I
X I/O3 15 600 300 200 L 50 50 1 0 B
X ~CAS 16 -500 -600 200 R 50 50 1 0 I
X I/O4 17 600 200 200 L 50 50 1 0 B
X GND 18 600 -700 200 L 50 50 1 0 W
X I/O1 2 600 500 200 L 50 50 1 0 B
X I/O2 3 600 400 200 L 50 50 1 0 B
X ~WE 4 -500 -400 200 R 50 50 1 0 I
X ~RAS 5 -500 -700 200 R 50 50 1 0 I
X A6 6 -500 -100 200 R 50 50 1 0 I
X A5 7 -500 0 200 R 50 50 1 0 I
X A4 8 -500 100 200 R 50 50 1 0 I
X VCC 9 600 -300 200 L 50 50 1 0 W
ENDDRAW
ENDDEF
#
# C128-VRAM-64K-Expansion-rescue_C5_2.5-C128-VRAM-64K-Expansion-eagle-import
#
DEF C128-VRAM-64K-Expansion-rescue_C5_2.5-C128-VRAM-64K-Expansion-eagle-import C 0 40 Y Y 1 L N
F0 "C" 60 15 59 H V L BNN
F1 "C128-VRAM-64K-Expansion-rescue_C5_2.5-C128-VRAM-64K-Expansion-eagle-import" 60 -185 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -80 -80 80 -60 1 0 0 F
S -80 -40 80 -20 1 0 0 F
P 2 1 0 0 0 -100 0 -80 N
P 2 1 0 0 0 0 0 -20 N
X 1 1 0 100 100 D 0 0 1 0 P
X 2 2 0 -200 100 U 0 0 1 0 P
ENDDRAW
ENDDEF
#
# C128-VRAM-64K-Expansion-rescue_DIL48-C128-VRAM-64K-Expansion-eagle-import
#
DEF C128-VRAM-64K-Expansion-rescue_DIL48-C128-VRAM-64K-Expansion-eagle-import IC 0 40 Y Y 1 L N
F0 "IC" -175 1175 59 H V L BNN
F1 "C128-VRAM-64K-Expansion-rescue_DIL48-C128-VRAM-64K-Expansion-eagle-import" -175 -1350 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
A 0 1150 100 -1799 -1 1 0 10 N -100 1150 100 1150
P 2 1 0 0 -200 -1250 200 -1250 N
P 2 1 0 0 -200 1150 -200 -1250 N
P 2 1 0 0 -200 1150 -100 1150 N
P 2 1 0 0 200 -1250 200 1150 N
P 2 1 0 0 200 1150 100 1150 N
X 1 1 -300 1100 100 R 50 0 1 0 P
X 10 10 -300 200 100 R 50 0 1 0 P
X 11 11 -300 100 100 R 50 0 1 0 P
X 12 12 -300 0 100 R 50 0 1 0 P
X 13 13 -300 -100 100 R 50 0 1 0 P
X 14 14 -300 -200 100 R 50 0 1 0 P
X 15 15 -300 -300 100 R 50 0 1 0 P
X 16 16 -300 -400 100 R 50 0 1 0 P
X 17 17 -300 -500 100 R 50 0 1 0 P
X 18 18 -300 -600 100 R 50 0 1 0 P
X 19 19 -300 -700 100 R 50 0 1 0 P
X 2 2 -300 1000 100 R 50 0 1 0 P
X 20 20 -300 -800 100 R 50 0 1 0 P
X 21 21 -300 -900 100 R 50 0 1 0 P
X 22 22 -300 -1000 100 R 50 0 1 0 P
X 23 23 -300 -1100 100 R 50 0 1 0 P
X 24 24 -300 -1200 100 R 50 0 1 0 P
X 25 25 300 -1200 100 L 50 0 1 0 P
X 26 26 300 -1100 100 L 50 0 1 0 P
X 27 27 300 -1000 100 L 50 0 1 0 P
X 28 28 300 -900 100 L 50 0 1 0 P
X 29 29 300 -800 100 L 50 0 1 0 P
X 3 3 -300 900 100 R 50 0 1 0 P
X 30 30 300 -700 100 L 50 0 1 0 P
X 31 31 300 -600 100 L 50 0 1 0 P
X 32 32 300 -500 100 L 50 0 1 0 P
X 33 33 300 -400 100 L 50 0 1 0 P
X 34 34 300 -300 100 L 50 0 1 0 P
X 35 35 300 -200 100 L 50 0 1 0 P
X 36 36 300 -100 100 L 50 0 1 0 P
X 37 37 300 0 100 L 50 0 1 0 P
X 38 38 300 100 100 L 50 0 1 0 P
X 39 39 300 200 100 L 50 0 1 0 P
X 4 4 -300 800 100 R 50 0 1 0 P
X 40 40 300 300 100 L 50 0 1 0 P
X 41 41 300 400 100 L 50 0 1 0 P
X 42 42 300 500 100 L 50 0 1 0 P
X 43 43 300 600 100 L 50 0 1 0 P
X 44 44 300 700 100 L 50 0 1 0 P
X 45 45 300 800 100 L 50 0 1 0 P
X 46 46 300 900 100 L 50 0 1 0 P
X 47 47 300 1000 100 L 50 0 1 0 P
X 48 48 300 1100 100 L 50 0 1 0 P
X 5 5 -300 700 100 R 50 0 1 0 P
X 6 6 -300 600 100 R 50 0 1 0 P
X 7 7 -300 500 100 R 50 0 1 0 P
X 8 8 -300 400 100 R 50 0 1 0 P
X 9 9 -300 300 100 R 50 0 1 0 P
ENDDRAW
ENDDEF
#
# C128-VRAM-64K-Expansion-rescue_GND-C128-VRAM-64K-Expansion-eagle-import
#
DEF C128-VRAM-64K-Expansion-rescue_GND-C128-VRAM-64K-Expansion-eagle-import #GND 0 40 Y Y 1 L P
F0 "#GND" 0 0 50 H I C CNN
F1 "C128-VRAM-64K-Expansion-rescue_GND-C128-VRAM-64K-Expansion-eagle-import" -100 -100 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -75 0 75 0 N
X GND 1 0 100 100 D 0 0 1 0 W
ENDDRAW
ENDDEF
#
# C128-VRAM-64K-Expansion-rescue_MOS8563-C128-VRAM-64K-Expansion-eagle-import
#
DEF C128-VRAM-64K-Expansion-rescue_MOS8563-C128-VRAM-64K-Expansion-eagle-import IC 0 40 Y Y 1 L N
F0 "IC" -375 1175 59 H V L BNN
F1 "C128-VRAM-64K-Expansion-rescue_MOS8563-C128-VRAM-64K-Expansion-eagle-import" -375 -1350 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
A 50 1150 110 -1799 -1 1 0 10 N -60 1150 160 1150
T 0 -310 670 51 0 1 0 N/C Normal 0 L B
P 2 1 0 0 -400 -1250 500 -1250 N
P 2 1 0 0 -400 1150 -400 -1250 N
P 2 1 0 0 -400 1150 -300 1150 N
P 2 1 0 0 -300 1150 -60 1150 N
P 2 1 0 0 400 1150 160 1150 N
P 2 1 0 0 500 -1250 500 1150 N
P 2 1 0 0 500 1150 400 1150 N
X CCLK 1 -500 1100 100 R 50 50 1 0 P
X D7 10 -500 200 100 R 50 50 1 0 P
X D6 11 -500 100 100 R 50 50 1 0 P
X VSS 12 -500 0 100 R 50 50 1 0 P
X D5 13 -500 -100 100 R 50 50 1 0 P
X D4 14 -500 -200 100 R 50 50 1 0 P
X D3 15 -500 -300 100 R 50 50 1 0 P
X D2 16 -500 -400 100 R 50 50 1 0 P
X D1 17 -500 -500 100 R 50 50 1 0 P
X D0 18 -500 -600 100 R 50 50 1 0 P
X DISPEN 19 -500 -700 100 R 50 50 1 0 P
X ~DCLK 2 -500 1000 100 R 50 50 1 0 P
X VSYNC 20 -500 -800 100 R 50 50 1 0 P
X DR/~W 21 -500 -900 100 R 50 50 1 0 P
X INIT 22 -500 -1000 100 R 50 50 1 0 P
X ~RES 23 -500 -1100 100 R 50 50 1 0 P
X TEST 24 -500 -1200 100 R 50 50 1 0 P
X LPEN 25 600 -1200 100 L 50 50 1 0 P
X DA0 26 600 -1100 100 L 50 50 1 0 P
X DA1 27 600 -1000 100 L 50 50 1 0 P
X DA2 28 600 -900 100 L 50 50 1 0 P
X DA3 29 600 -800 100 L 50 50 1 0 P
X HSYNC 3 -500 900 100 R 50 50 1 0 P
X DA4 30 600 -700 100 L 50 50 1 0 P
X DA5 31 600 -600 100 L 50 50 1 0 P
X DA6 32 600 -500 100 L 50 50 1 0 P
X DA7 33 600 -400 100 L 50 50 1 0 P
X DD0 34 600 -300 100 L 50 50 1 0 P
X DD1 35 600 -200 100 L 50 50 1 0 P
X DD2 36 600 -100 100 L 50 50 1 0 P
X VDD 37 600 0 100 L 50 50 1 0 P
X DD3 38 600 100 100 L 50 50 1 0 P
X DD4 39 600 200 100 L 50 50 1 0 P
X CS 4 -500 800 100 R 50 50 1 0 P
X DD5 40 600 300 100 L 50 50 1 0 P
X DD6 41 600 400 100 L 50 50 1 0 P
X DD7 42 600 500 100 L 50 50 1 0 P
X I 43 600 600 100 L 50 50 1 0 P
X B 44 600 700 100 L 50 50 1 0 P
X G 45 600 800 100 L 50 50 1 0 P
X R 46 600 900 100 L 50 50 1 0 P
X ~RAS 47 600 1000 100 L 50 50 1 0 P
X ~CAS 48 600 1100 100 L 50 50 1 0 P
X NC 5 -500 700 100 R 50 0 1 0 N
X N/C 6 -500 600 100 R 50 50 1 0 N
X ~CS 7 -500 500 100 R 50 50 1 0 P
X ~RS 8 -500 400 100 R 50 50 1 0 P
X R/~W 9 -500 300 100 R 50 50 1 0 P
ENDDRAW
ENDDEF
#
# C128-VRAM-64K-Expansion-rescue_VCC-C128-VRAM-64K-Expansion-eagle-import
#
DEF C128-VRAM-64K-Expansion-rescue_VCC-C128-VRAM-64K-Expansion-eagle-import #SUPPLY 0 40 Y Y 1 L P
F0 "#SUPPLY" 0 0 50 H I C CNN
F1 "C128-VRAM-64K-Expansion-rescue_VCC-C128-VRAM-64K-Expansion-eagle-import" -75 125 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 50 50 1 0 10 N
X VCC 1 0 -100 100 U 0 0 1 0 W
ENDDRAW
ENDDEF
#
#End Library

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Schematic/C128-VRAM-64K-Expansion-rescue.dcm Normal file
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EESchema-DOCLIB Version 2.0
#
#End Doc Library

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Schematic/C128-VRAM-64K-Expansion-rescue.lib Normal file
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 41464C-C128-VRAM-64K-Expansion-eagle-import
#
DEF 41464C-C128-VRAM-64K-Expansion-eagle-import IC 0 40 Y Y 1 L N
F0 "IC" -300 625 59 H V L BNN
F1 "41464C-C128-VRAM-64K-Expansion-eagle-import" -300 -900 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -300 -800 -300 600 N
P 2 1 0 0 -300 -800 400 -800 N
P 2 1 0 0 400 600 -300 600 N
P 2 1 0 0 400 600 400 -800 N
X ~OE 1 -500 -500 200 R 50 50 1 0 I
X A7 10 -500 -200 200 R 50 50 1 0 I
X A3 11 -500 200 200 R 50 50 1 0 I
X A2 12 -500 300 200 R 50 50 1 0 I
X A1 13 -500 400 200 R 50 50 1 0 I
X A0 14 -500 500 200 R 50 50 1 0 I
X I/O3 15 600 300 200 L 50 50 1 0 B
X ~CAS 16 -500 -600 200 R 50 50 1 0 I
X I/O4 17 600 200 200 L 50 50 1 0 B
X GND 18 600 -700 200 L 50 50 1 0 W
X I/O1 2 600 500 200 L 50 50 1 0 B
X I/O2 3 600 400 200 L 50 50 1 0 B
X ~WE 4 -500 -400 200 R 50 50 1 0 I
X ~RAS 5 -500 -700 200 R 50 50 1 0 I
X A6 6 -500 -100 200 R 50 50 1 0 I
X A5 7 -500 0 200 R 50 50 1 0 I
X A4 8 -500 100 200 R 50 50 1 0 I
X VCC 9 600 -300 200 L 50 50 1 0 W
ENDDRAW
ENDDEF
#
# A4L-LOC-C128-VRAM-64K-Expansion-eagle-import
#
DEF A4L-LOC-C128-VRAM-64K-Expansion-eagle-import #FRAME 0 40 Y Y 1 L N
F0 "#FRAME" 0 0 50 H I C CNN
F1 "A4L-LOC-C128-VRAM-64K-Expansion-eagle-import" 0 0 50 H I C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
T 0 8550 600 85 0 1 0 >DRAWING_NAME Normal 0 L B
T 0 8550 400 76 0 1 0 >LAST_DATE_TIME Normal 0 L B
T 0 9075 200 85 0 1 0 >SHEET Normal 0 L B
T 0 8540 195 85 0 1 0 Sheet: Normal 0 L B
P 2 1 0 0 6350 150 6350 950 N
P 2 1 0 0 6350 950 8475 950 N
P 2 1 0 0 8475 350 8475 150 N
P 2 1 0 0 8475 350 8475 550 N
P 2 1 0 0 8475 550 8475 750 N
P 2 1 0 0 8475 550 10100 550 N
P 2 1 0 0 8475 750 8475 950 N
P 2 1 0 0 8475 750 10100 750 N
P 2 1 0 0 8475 950 10100 950 N
P 2 1 0 0 9700 150 9700 350 N
P 2 1 0 0 9700 350 8475 350 N
P 2 1 0 0 9700 350 10100 350 N
P 2 1 0 0 10100 150 10100 350 N
P 2 1 0 0 10100 350 10100 550 N
P 2 1 0 0 10100 550 10100 750 N
P 2 1 0 0 10100 750 10100 950 N
ENDDRAW
ENDDEF
#
# C5_2.5-C128-VRAM-64K-Expansion-eagle-import
#
DEF C5_2.5-C128-VRAM-64K-Expansion-eagle-import C 0 40 Y Y 1 L N
F0 "C" 60 15 59 H V L BNN
F1 "C5_2.5-C128-VRAM-64K-Expansion-eagle-import" 60 -185 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -80 -80 80 -60 1 0 0 F
S -80 -40 80 -20 1 0 0 F
P 2 1 0 0 0 -100 0 -80 N
P 2 1 0 0 0 0 0 -20 N
X 1 1 0 100 100 D 0 0 1 0 P
X 2 2 0 -200 100 U 0 0 1 0 P
ENDDRAW
ENDDEF
#
# DIL48-C128-VRAM-64K-Expansion-eagle-import
#
DEF DIL48-C128-VRAM-64K-Expansion-eagle-import IC 0 40 Y Y 1 L N
F0 "IC" -175 1175 59 H V L BNN
F1 "DIL48-C128-VRAM-64K-Expansion-eagle-import" -175 -1350 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
A 0 1150 100 -1799 -1 1 0 10 N -100 1150 100 1150
P 2 1 0 0 -200 -1250 200 -1250 N
P 2 1 0 0 -200 1150 -200 -1250 N
P 2 1 0 0 -200 1150 -100 1150 N
P 2 1 0 0 200 -1250 200 1150 N
P 2 1 0 0 200 1150 100 1150 N
X 1 1 -300 1100 100 R 50 0 1 0 P
X 10 10 -300 200 100 R 50 0 1 0 P
X 11 11 -300 100 100 R 50 0 1 0 P
X 12 12 -300 0 100 R 50 0 1 0 P
X 13 13 -300 -100 100 R 50 0 1 0 P
X 14 14 -300 -200 100 R 50 0 1 0 P
X 15 15 -300 -300 100 R 50 0 1 0 P
X 16 16 -300 -400 100 R 50 0 1 0 P
X 17 17 -300 -500 100 R 50 0 1 0 P
X 18 18 -300 -600 100 R 50 0 1 0 P
X 19 19 -300 -700 100 R 50 0 1 0 P
X 2 2 -300 1000 100 R 50 0 1 0 P
X 20 20 -300 -800 100 R 50 0 1 0 P
X 21 21 -300 -900 100 R 50 0 1 0 P
X 22 22 -300 -1000 100 R 50 0 1 0 P
X 23 23 -300 -1100 100 R 50 0 1 0 P
X 24 24 -300 -1200 100 R 50 0 1 0 P
X 25 25 300 -1200 100 L 50 0 1 0 P
X 26 26 300 -1100 100 L 50 0 1 0 P
X 27 27 300 -1000 100 L 50 0 1 0 P
X 28 28 300 -900 100 L 50 0 1 0 P
X 29 29 300 -800 100 L 50 0 1 0 P
X 3 3 -300 900 100 R 50 0 1 0 P
X 30 30 300 -700 100 L 50 0 1 0 P
X 31 31 300 -600 100 L 50 0 1 0 P
X 32 32 300 -500 100 L 50 0 1 0 P
X 33 33 300 -400 100 L 50 0 1 0 P
X 34 34 300 -300 100 L 50 0 1 0 P
X 35 35 300 -200 100 L 50 0 1 0 P
X 36 36 300 -100 100 L 50 0 1 0 P
X 37 37 300 0 100 L 50 0 1 0 P
X 38 38 300 100 100 L 50 0 1 0 P
X 39 39 300 200 100 L 50 0 1 0 P
X 4 4 -300 800 100 R 50 0 1 0 P
X 40 40 300 300 100 L 50 0 1 0 P
X 41 41 300 400 100 L 50 0 1 0 P
X 42 42 300 500 100 L 50 0 1 0 P
X 43 43 300 600 100 L 50 0 1 0 P
X 44 44 300 700 100 L 50 0 1 0 P
X 45 45 300 800 100 L 50 0 1 0 P
X 46 46 300 900 100 L 50 0 1 0 P
X 47 47 300 1000 100 L 50 0 1 0 P
X 48 48 300 1100 100 L 50 0 1 0 P
X 5 5 -300 700 100 R 50 0 1 0 P
X 6 6 -300 600 100 R 50 0 1 0 P
X 7 7 -300 500 100 R 50 0 1 0 P
X 8 8 -300 400 100 R 50 0 1 0 P
X 9 9 -300 300 100 R 50 0 1 0 P
ENDDRAW
ENDDEF
#
# GND-C128-VRAM-64K-Expansion-eagle-import
#
DEF GND-C128-VRAM-64K-Expansion-eagle-import #GND 0 40 Y Y 1 L P
F0 "#GND" 0 0 50 H I C CNN
F1 "GND-C128-VRAM-64K-Expansion-eagle-import" -100 -100 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 1 0 0 -75 0 75 0 N
X GND 1 0 100 100 D 0 0 1 0 W
ENDDRAW
ENDDEF
#
# MOS8563-C128-VRAM-64K-Expansion-eagle-import
#
DEF MOS8563-C128-VRAM-64K-Expansion-eagle-import IC 0 40 Y Y 1 L N
F0 "IC" -375 1175 59 H V L BNN
F1 "MOS8563-C128-VRAM-64K-Expansion-eagle-import" -375 -1350 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
A 50 1150 110 -1799 -1 1 0 10 N -60 1150 160 1150
T 0 -310 670 51 0 1 0 N/C Normal 0 L B
P 2 1 0 0 -400 -1250 500 -1250 N
P 2 1 0 0 -400 1150 -400 -1250 N
P 2 1 0 0 -400 1150 -300 1150 N
P 2 1 0 0 -300 1150 -60 1150 N
P 2 1 0 0 400 1150 160 1150 N
P 2 1 0 0 500 -1250 500 1150 N
P 2 1 0 0 500 1150 400 1150 N
X CCLK 1 -500 1100 100 R 50 50 1 0 P
X D7 10 -500 200 100 R 50 50 1 0 P
X D6 11 -500 100 100 R 50 50 1 0 P
X VSS 12 -500 0 100 R 50 50 1 0 P
X D5 13 -500 -100 100 R 50 50 1 0 P
X D4 14 -500 -200 100 R 50 50 1 0 P
X D3 15 -500 -300 100 R 50 50 1 0 P
X D2 16 -500 -400 100 R 50 50 1 0 P
X D1 17 -500 -500 100 R 50 50 1 0 P
X D0 18 -500 -600 100 R 50 50 1 0 P
X DISPEN 19 -500 -700 100 R 50 50 1 0 P
X ~DCLK 2 -500 1000 100 R 50 50 1 0 P
X VSYNC 20 -500 -800 100 R 50 50 1 0 P
X DR/~W 21 -500 -900 100 R 50 50 1 0 P
X INIT 22 -500 -1000 100 R 50 50 1 0 P
X ~RES 23 -500 -1100 100 R 50 50 1 0 P
X TEST 24 -500 -1200 100 R 50 50 1 0 P
X LPEN 25 600 -1200 100 L 50 50 1 0 P
X DA0 26 600 -1100 100 L 50 50 1 0 P
X DA1 27 600 -1000 100 L 50 50 1 0 P
X DA2 28 600 -900 100 L 50 50 1 0 P
X DA3 29 600 -800 100 L 50 50 1 0 P
X HSYNC 3 -500 900 100 R 50 50 1 0 P
X DA4 30 600 -700 100 L 50 50 1 0 P
X DA5 31 600 -600 100 L 50 50 1 0 P
X DA6 32 600 -500 100 L 50 50 1 0 P
X DA7 33 600 -400 100 L 50 50 1 0 P
X DD0 34 600 -300 100 L 50 50 1 0 P
X DD1 35 600 -200 100 L 50 50 1 0 P
X DD2 36 600 -100 100 L 50 50 1 0 P
X VDD 37 600 0 100 L 50 50 1 0 P
X DD3 38 600 100 100 L 50 50 1 0 P
X DD4 39 600 200 100 L 50 50 1 0 P
X CS 4 -500 800 100 R 50 50 1 0 P
X DD5 40 600 300 100 L 50 50 1 0 P
X DD6 41 600 400 100 L 50 50 1 0 P
X DD7 42 600 500 100 L 50 50 1 0 P
X I 43 600 600 100 L 50 50 1 0 P
X B 44 600 700 100 L 50 50 1 0 P
X G 45 600 800 100 L 50 50 1 0 P
X R 46 600 900 100 L 50 50 1 0 P
X ~RAS 47 600 1000 100 L 50 50 1 0 P
X ~CAS 48 600 1100 100 L 50 50 1 0 P
X NC 5 -500 700 100 R 50 0 1 0 N
X N/C 6 -500 600 100 R 50 50 1 0 N
X ~CS 7 -500 500 100 R 50 50 1 0 P
X ~RS 8 -500 400 100 R 50 50 1 0 P
X R/~W 9 -500 300 100 R 50 50 1 0 P
ENDDRAW
ENDDEF
#
# VCC-C128-VRAM-64K-Expansion-eagle-import
#
DEF VCC-C128-VRAM-64K-Expansion-eagle-import #SUPPLY 0 40 Y Y 1 L P
F0 "#SUPPLY" 0 0 50 H I C CNN
F1 "VCC-C128-VRAM-64K-Expansion-eagle-import" -75 125 59 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 50 50 1 0 10 N
X VCC 1 0 -100 100 U 0 0 1 0 W
ENDDRAW
ENDDEF
#
#End Library

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(module C5B2.5 (layer F.Cu) (tedit 0)
(descr "<B>MKS2</B>, 7.5 x 2.5 mm, grid 5.08 mm")
(fp_text reference C1 (at -2.032 -1.524) (layer F.SilkS)
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
)
(fp_text value 22nF (at -2.032 2.794) (layer F.Fab)
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
)
(fp_line (start -0.3048 -0.635) (end -0.3048 0) (layer F.SilkS) (width 0.3048))
(fp_line (start -0.3048 0) (end -0.3048 0.635) (layer F.SilkS) (width 0.3048))
(fp_line (start -0.3048 0) (end -1.524 0) (layer F.SilkS) (width 0.1524))
(fp_line (start 0.3302 -0.635) (end 0.3302 0) (layer F.SilkS) (width 0.3048))
(fp_line (start 0.3302 0) (end 0.3302 0.635) (layer F.SilkS) (width 0.3048))
(fp_line (start 0.3302 0) (end 1.524 0) (layer F.SilkS) (width 0.1524))
(fp_line (start -3.683 -1.016) (end -3.683 1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start -3.429 1.27) (end 3.429 1.27) (layer F.SilkS) (width 0.1524))
(fp_line (start 3.683 1.016) (end 3.683 -1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start 3.429 -1.27) (end -3.429 -1.27) (layer F.SilkS) (width 0.1524))
(fp_arc (start 3.429 -1.016) (end 3.429 -1.27) (angle 90) (layer F.SilkS) (width 0.1524))
(fp_arc (start 3.429 1.016) (end 3.429 1.27) (angle -90) (layer F.SilkS) (width 0.1524))
(fp_arc (start -3.429 1.016) (end -3.683 1.016) (angle -90) (layer F.SilkS) (width 0.1524))
(fp_arc (start -3.429 -1.016) (end -3.683 -1.016) (angle 90) (layer F.SilkS) (width 0.1524))
(pad 1 thru_hole circle (at -2.54 0) (size 1.6002 1.6002) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 2 thru_hole circle (at 2.54 0) (size 1.6002 1.6002) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
)

51
Schematic/C128-VRAM-64K-Expansion.pretty/DIL18.kicad_mod Normal file
View File

@@ -0,0 +1,51 @@
(module DIL18 (layer F.Cu) (tedit 0)
(descr "<b>Dual In Line Package</b>")
(fp_text reference IC4 (at -11.684 3.048 -270) (layer F.SilkS)
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
)
(fp_text value "" (at -9.525 0.635 -180) (layer F.Fab)
(effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom))
)
(fp_line (start 11.43 -2.921) (end -11.43 -2.921) (layer F.SilkS) (width 0.1524))
(fp_line (start -11.43 2.921) (end 11.43 2.921) (layer F.SilkS) (width 0.1524))
(fp_line (start 11.43 -2.921) (end 11.43 2.921) (layer F.SilkS) (width 0.1524))
(fp_line (start -11.43 -2.921) (end -11.43 -1.016) (layer F.SilkS) (width 0.1524))
(fp_line (start -11.43 2.921) (end -11.43 1.016) (layer F.SilkS) (width 0.1524))
(fp_arc (start -11.43 0) (end -11.43 -1.016) (angle 180) (layer F.SilkS) (width 0.1524))
(pad 1 thru_hole oval (at -10.16 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 2 thru_hole oval (at -7.62 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 7 thru_hole oval (at 5.08 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 8 thru_hole oval (at 7.62 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 3 thru_hole oval (at -5.08 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 4 thru_hole oval (at -2.54 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 6 thru_hole oval (at 2.54 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 5 thru_hole oval (at 0 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 9 thru_hole oval (at 10.16 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 10 thru_hole oval (at 10.16 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 11 thru_hole oval (at 7.62 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 12 thru_hole oval (at 5.08 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 13 thru_hole oval (at 2.54 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 14 thru_hole oval (at 0 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 15 thru_hole oval (at -2.54 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 16 thru_hole oval (at -5.08 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 17 thru_hole oval (at -7.62 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 18 thru_hole oval (at -10.16 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
)

111
Schematic/C128-VRAM-64K-Expansion.pretty/DIL48.kicad_mod Normal file
View File

@@ -0,0 +1,111 @@
(module DIL48 (layer F.Cu) (tedit 0)
(descr "<b>Dual In Line Package</b>")
(fp_text reference IC2 (at -30.226 6.35 -270) (layer F.SilkS)
(effects (font (size 1.6891 1.6891) (thickness 0.16891)) (justify left bottom))
)
(fp_text value "" (at -16.637 1.016 -180) (layer F.Fab)
(effects (font (size 1.6891 1.6891) (thickness 0.16891)) (justify left bottom))
)
(fp_line (start -29.845 6.604) (end 29.845 6.604) (layer F.SilkS) (width 0.1524))
(fp_line (start 29.845 6.604) (end 29.845 -6.604) (layer F.SilkS) (width 0.1524))
(fp_line (start 29.845 -6.604) (end -29.845 -6.604) (layer F.SilkS) (width 0.1524))
(fp_line (start -29.845 -6.604) (end -29.845 -0.889) (layer F.SilkS) (width 0.1524))
(fp_line (start -29.845 6.604) (end -29.845 1.143) (layer F.SilkS) (width 0.1524))
(fp_arc (start -29.845 0.127) (end -29.845 -0.889) (angle 180) (layer F.SilkS) (width 0.1524))
(pad 1 thru_hole oval (at -29.21 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 2 thru_hole oval (at -26.67 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 3 thru_hole oval (at -24.13 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 4 thru_hole oval (at -21.59 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 5 thru_hole oval (at -19.05 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 6 thru_hole oval (at -16.51 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 7 thru_hole oval (at -13.97 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 8 thru_hole oval (at -11.43 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 9 thru_hole oval (at -8.89 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 10 thru_hole oval (at -6.35 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 11 thru_hole oval (at -3.81 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 12 thru_hole oval (at -1.27 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 13 thru_hole oval (at 1.27 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 14 thru_hole oval (at 3.81 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 15 thru_hole oval (at 6.35 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 16 thru_hole oval (at 8.89 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 17 thru_hole oval (at 11.43 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 18 thru_hole oval (at 13.97 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 19 thru_hole oval (at 16.51 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 20 thru_hole oval (at 19.05 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 21 thru_hole oval (at 21.59 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 22 thru_hole oval (at 24.13 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 23 thru_hole oval (at 26.67 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 24 thru_hole oval (at 29.21 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 25 thru_hole oval (at 29.21 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 26 thru_hole oval (at 26.67 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 27 thru_hole oval (at 24.13 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 28 thru_hole oval (at 21.59 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 29 thru_hole oval (at 19.05 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 30 thru_hole oval (at 16.51 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 31 thru_hole oval (at 13.97 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 32 thru_hole oval (at 11.43 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 33 thru_hole oval (at 8.89 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 34 thru_hole oval (at 6.35 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 35 thru_hole oval (at 3.81 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 36 thru_hole oval (at 1.27 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 37 thru_hole oval (at -1.27 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 38 thru_hole oval (at -3.81 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 39 thru_hole oval (at -6.35 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 40 thru_hole oval (at -8.89 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 41 thru_hole oval (at -11.43 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 42 thru_hole oval (at -13.97 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 43 thru_hole oval (at -16.51 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 44 thru_hole oval (at -19.05 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 45 thru_hole oval (at -21.59 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 46 thru_hole oval (at -24.13 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 47 thru_hole oval (at -26.67 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 48 thru_hole oval (at -29.21 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
)

111
Schematic/C128-VRAM-64K-Expansion.pretty/MOS8563.kicad_mod Normal file
View File

@@ -0,0 +1,111 @@
(module MOS8563 (layer F.Cu) (tedit 0)
(descr "<b>Dual In Line Package</b>")
(fp_text reference IC1 (at -30.226 6.35 -270) (layer F.SilkS)
(effects (font (size 1.6891 1.6891) (thickness 0.16891)) (justify left bottom))
)
(fp_text value "" (at -16.637 1.016 -180) (layer F.Fab)
(effects (font (size 1.6891 1.6891) (thickness 0.16891)) (justify left bottom))
)
(fp_line (start -29.845 6.604) (end 29.845 6.604) (layer F.SilkS) (width 0.1524))
(fp_line (start 29.845 6.604) (end 29.845 -6.604) (layer F.SilkS) (width 0.1524))
(fp_line (start 29.845 -6.604) (end -29.845 -6.604) (layer F.SilkS) (width 0.1524))
(fp_line (start -29.845 -6.604) (end -29.845 -0.889) (layer F.SilkS) (width 0.1524))
(fp_line (start -29.845 6.604) (end -29.845 1.143) (layer F.SilkS) (width 0.1524))
(fp_arc (start -29.845 0.127) (end -29.845 -0.889) (angle 180) (layer F.SilkS) (width 0.1524))
(pad 1 thru_hole oval (at -29.21 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 2 thru_hole oval (at -26.67 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 3 thru_hole oval (at -24.13 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 4 thru_hole oval (at -21.59 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 5 thru_hole oval (at -19.05 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 6 thru_hole oval (at -16.51 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 7 thru_hole oval (at -13.97 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 8 thru_hole oval (at -11.43 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 9 thru_hole oval (at -8.89 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 10 thru_hole oval (at -6.35 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 11 thru_hole oval (at -3.81 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 12 thru_hole oval (at -1.27 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 13 thru_hole oval (at 1.27 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 14 thru_hole oval (at 3.81 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 15 thru_hole oval (at 6.35 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 16 thru_hole oval (at 8.89 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 17 thru_hole oval (at 11.43 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 18 thru_hole oval (at 13.97 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 19 thru_hole oval (at 16.51 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 20 thru_hole oval (at 19.05 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 21 thru_hole oval (at 21.59 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 22 thru_hole oval (at 24.13 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 23 thru_hole oval (at 26.67 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 24 thru_hole oval (at 29.21 7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 25 thru_hole oval (at 29.21 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 26 thru_hole oval (at 26.67 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 27 thru_hole oval (at 24.13 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 28 thru_hole oval (at 21.59 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 29 thru_hole oval (at 19.05 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 30 thru_hole oval (at 16.51 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 31 thru_hole oval (at 13.97 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 32 thru_hole oval (at 11.43 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 33 thru_hole oval (at 8.89 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 34 thru_hole oval (at 6.35 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 35 thru_hole oval (at 3.81 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 36 thru_hole oval (at 1.27 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 37 thru_hole oval (at -1.27 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 38 thru_hole oval (at -3.81 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 39 thru_hole oval (at -6.35 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 40 thru_hole oval (at -8.89 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 41 thru_hole oval (at -11.43 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 42 thru_hole oval (at -13.97 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 43 thru_hole oval (at -16.51 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 44 thru_hole oval (at -19.05 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 45 thru_hole oval (at -21.59 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 46 thru_hole oval (at -24.13 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 47 thru_hole oval (at -26.67 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
(pad 48 thru_hole oval (at -29.21 -7.62 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask)
(solder_mask_margin 0.1016))
)

259
Schematic/C128-VRAM-64K-Expansion.pro Normal file
View File

@@ -0,0 +1,259 @@
update=01/10/21 21:45:14
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=empty.kicad_wks
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.1524
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.262672
TrackWidth1=0.25
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=Top
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=Bottom
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.1524
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Power
Clearance=0.1524
TrackWidth=0.5
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

852
Schematic/C128-VRAM-64K-Expansion.sch Normal file
View File

@@ -0,0 +1,852 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr User 11774 8268
encoding utf-8
Sheet 1 1
Title "RCEU2364 C128 64KB VRAM"
Date "2021-02-03"
Rev "v1.2"
Comp "https://retro-commodore.eu"
Comment1 ""
Comment2 ""
Comment3 "Copyright (c) 2018-2021"
Comment4 "by Tomse"
$EndDescr
Wire Bus Line
1300 2000 3700 2000
Wire Bus Line
4500 4700 2600 4700
Text Label 3800 2200 0 10 ~ 0
CCLK
Text Label 1400 2200 0 10 ~ 0
CCLK
Text Label 3800 2300 0 10 ~ 0
~DCLK
Text Label 1400 2300 0 10 ~ 0
~DCLK
Text Label 3800 2400 0 10 ~ 0
HSYNC
Text Label 1400 2400 0 10 ~ 0
HSYNC
Text Label 3800 2500 0 10 ~ 0
CS
Text Label 1400 2500 0 10 ~ 0
CS
Text Label 3800 2600 0 10 ~ 0
NC
Text Label 1400 2600 0 10 ~ 0
NC
Text Label 3800 2700 0 10 ~ 0
N/C
Text Label 1400 2700 0 10 ~ 0
N/C
Text Label 3800 2800 0 10 ~ 0
~CS
Text Label 1400 2800 0 10 ~ 0
~CS
Text Label 3800 2900 0 10 ~ 0
~RS
Text Label 1400 2900 0 10 ~ 0
~RS
Text Label 3800 3000 0 10 ~ 0
R/~W
Text Label 1400 3000 0 10 ~ 0
R/~W
Text Label 3800 3100 0 10 ~ 0
D7
Text Label 1400 3100 0 10 ~ 0
D7
Text Label 3800 3200 0 10 ~ 0
D6
Text Label 1400 3200 0 10 ~ 0
D6
Text Label 3800 4500 0 10 ~ 0
TEST
Text Label 1400 4500 0 10 ~ 0
TEST
Text Label 3800 4400 0 10 ~ 0
~RES
Text Label 1400 4400 0 10 ~ 0
~RES
Text Label 3800 4300 0 10 ~ 0
INIT
Text Label 1400 4300 0 10 ~ 0
INIT
Text Label 3800 4200 0 10 ~ 0
DR/~W
Text Label 1400 4200 0 10 ~ 0
DR/~W
Wire Wire Line
6800 3800 6700 3800
Wire Wire Line
6700 3800 6700 4800
Wire Wire Line
6700 4800 1100 4800
Wire Wire Line
1100 4800 1100 4200
Wire Wire Line
9000 3800 9000 4800
Wire Wire Line
9000 4800 6700 4800
Wire Wire Line
1100 4200 1200 4200
Connection ~ 6700 4800
Text Label 6800 3800 0 10 ~ 0
DR/~W
Text Label 3800 4100 0 10 ~ 0
VSYNC
Text Label 1400 4100 0 10 ~ 0
VSYNC
Text Label 3800 4000 0 10 ~ 0
DISPEN
Text Label 1400 4000 0 10 ~ 0
DISPEN
Text Label 3800 3900 0 10 ~ 0
D0
Text Label 1400 3900 0 10 ~ 0
D0
Text Label 3800 3800 0 10 ~ 0
D1
Text Label 1400 3800 0 10 ~ 0
D1
Text Label 3800 3700 0 10 ~ 0
D2
Text Label 1400 3700 0 10 ~ 0
D2
Text Label 3800 3600 0 10 ~ 0
D3
Text Label 1400 3600 0 10 ~ 0
D3
Text Label 3800 3500 0 10 ~ 0
D4
Text Label 1400 3500 0 10 ~ 0
D4
Text Label 3800 3400 0 10 ~ 0
D5
Text Label 1400 3400 0 10 ~ 0
D5
Text Label 2500 2200 0 10 ~ 0
~CAS
Wire Wire Line
4600 2200 5800 2200
Wire Wire Line
6800 4000 5800 4000
Wire Wire Line
9300 4000 9200 4000
Wire Wire Line
9200 4000 9200 4600
Wire Wire Line
9200 4600 5800 4600
Wire Wire Line
5800 4600 5800 4000
Wire Wire Line
5800 2200 5800 4000
Connection ~ 5800 4000
Text Label 4400 2200 0 10 ~ 0
~CAS
Text Label 4400 2300 0 10 ~ 0
~RAS
Text Label 2500 2300 0 10 ~ 0
~RAS
Wire Wire Line
6800 4100 5900 4100
Wire Wire Line
9300 4100 9300 4500
Wire Wire Line
9300 4500 5900 4500
Wire Wire Line
5900 4500 5900 4100
Wire Wire Line
4600 2300 5900 2300
Wire Wire Line
5900 2300 5900 4100
Connection ~ 5900 4100
Text Label 6800 4100 0 10 ~ 0
~RAS
Text Label 2500 2400 0 10 ~ 0
R
Text Label 2500 2500 0 10 ~ 0
G
Text Label 2500 2600 0 10 ~ 0
B
Text Label 2500 2700 0 10 ~ 0
I
Text Label 4400 3700 0 10 ~ 0
DA7
Text Label 2500 3700 0 10 ~ 0
DA7
Wire Wire Line
4600 3700 5000 3700
Wire Wire Line
5000 3700 5000 2900
Wire Wire Line
9300 2900 9200 2900
Wire Wire Line
9200 2900 9200 2600
Wire Wire Line
9200 2600 6700 2600
Wire Wire Line
6700 2600 6700 2900
Wire Wire Line
6700 2900 6800 2900
Wire Wire Line
5000 2900 6700 2900
Connection ~ 6700 2900
Text Label 4400 3700 0 10 ~ 0
DA7
Text Label 4400 3800 0 10 ~ 0
DA6
Text Label 2500 3800 0 10 ~ 0
DA6
Wire Wire Line
4600 3800 5100 3800
Wire Wire Line
5100 3800 5100 3000
Wire Wire Line
6800 3000 6600 3000
Wire Wire Line
6600 3000 6600 2500
Wire Wire Line
6600 2500 9100 2500
Wire Wire Line
9100 2500 9100 3000
Wire Wire Line
9100 3000 9300 3000
Wire Wire Line
5100 3000 6600 3000
Connection ~ 6600 3000
Text Label 4400 3800 0 10 ~ 0
DA6
Text Label 4400 3900 0 10 ~ 0
DA5
Text Label 2500 3900 0 10 ~ 0
DA5
Wire Wire Line
4600 3900 5600 3900
Wire Wire Line
5600 3900 5600 3500
Wire Wire Line
8600 3500 8600 2000
Wire Wire Line
6800 3500 6100 3500
Wire Wire Line
6100 3500 6100 2000
Wire Wire Line
5600 3500 6100 3500
Connection ~ 6100 3500
Text Label 4400 3900 0 10 ~ 0
DA5
Text Label 4400 4000 0 10 ~ 0
DA4
Text Label 2500 4000 0 10 ~ 0
DA4
Wire Wire Line
4600 4000 5200 4000
Wire Wire Line
5200 4000 5200 3100
Wire Wire Line
9300 3100 9000 3100
Wire Wire Line
9000 3100 9000 2400
Wire Wire Line
6800 3100 6500 3100
Wire Wire Line
6500 3100 6500 2400
Wire Wire Line
5200 3100 6500 3100
Connection ~ 6500 3100
Text Label 4400 4000 0 10 ~ 0
DA4
Text Label 4400 4100 0 10 ~ 0
DA3
Text Label 2500 4100 0 10 ~ 0
DA3
Wire Wire Line
4600 4100 5500 4100
Wire Wire Line
5500 4100 5500 3400
Wire Wire Line
6800 3400 6200 3400
Wire Wire Line
6200 3400 6200 2100
Wire Wire Line
6200 2100 8700 2100
Wire Wire Line
8700 2100 8700 3400
Wire Wire Line
8700 3400 9300 3400
Wire Wire Line
5500 3400 6200 3400
Connection ~ 6200 3400
Text Label 4400 4100 0 10 ~ 0
DA3
Text Label 4400 4200 0 10 ~ 0
DA2
Text Label 2500 4200 0 10 ~ 0
DA2
Wire Wire Line
4600 4200 5300 4200
Wire Wire Line
5300 4200 5300 3200
Wire Wire Line
8900 3200 8900 2300
Wire Wire Line
8900 2300 6400 2300
Wire Wire Line
5300 3200 6400 3200
Connection ~ 6400 3200
Text Label 4400 4200 0 10 ~ 0
DA2
Text Label 4400 4300 0 10 ~ 0
DA1
Text Label 2500 4300 0 10 ~ 0
DA1
Wire Wire Line
4600 4300 5400 4300
Wire Wire Line
5400 4300 5400 3300
Wire Wire Line
9300 3300 8800 3300
Wire Wire Line
8800 3300 8800 2200
Wire Wire Line
6300 2200 6300 3300
Wire Wire Line
6300 3300 6800 3300
Wire Wire Line
5400 3300 6300 3300
Connection ~ 6300 3300
Text Label 4400 4300 0 10 ~ 0
DA1
Text Label 4400 4400 0 10 ~ 0
DA0
Text Label 2500 4400 0 10 ~ 0
DA0
Wire Wire Line
4600 4400 5700 4400
Wire Wire Line
5700 4400 5700 3600
Wire Wire Line
9300 3600 8500 3600
Wire Wire Line
8500 3600 8500 1900
Wire Wire Line
6000 1900 6000 3600
Wire Wire Line
5700 3600 6000 3600
Connection ~ 6000 3600
Text Label 4400 4400 0 10 ~ 0
DA0
Text Label 4400 4500 0 10 ~ 0
LPEN
Text Label 2500 4500 0 10 ~ 0
LPEN
Wire Wire Line
6000 5200 6000 5300
Wire Wire Line
7900 3700 8400 3700
Wire Wire Line
8400 3700 8400 5200
Wire Wire Line
8400 5200 6000 5200
Wire Wire Line
10400 3700 10600 3700
Wire Wire Line
10600 3700 10600 5200
Wire Wire Line
10600 5200 8400 5200
Connection ~ 6000 5200
Connection ~ 8400 5200
Text Label 6000 5200 0 10 ~ 0
VCC
Text Label 2500 3300 0 10 ~ 0
VCC
Text Label 4400 3300 0 10 ~ 0
VCC
Wire Wire Line
2800 2800 2800 900
Wire Wire Line
10800 900 10800 3200
Wire Wire Line
10800 3200 10400 3200
Wire Wire Line
2900 2900 2900 1000
Wire Wire Line
2900 1000 10500 1000
Wire Wire Line
10500 1000 10500 2900
Wire Wire Line
10500 2900 10400 2900
Wire Wire Line
3000 3000 3000 1100
Wire Wire Line
3000 1100 10600 1100
Wire Wire Line
10600 1100 10600 3000
Wire Wire Line
10600 3000 10400 3000
Wire Wire Line
3100 3100 3100 1200
Wire Wire Line
3100 1200 10700 1200
Wire Wire Line
10700 1200 10700 3100
Wire Wire Line
10700 3100 10400 3100
Wire Wire Line
3200 3200 3200 1300
Wire Wire Line
3200 1300 8100 1300
Wire Wire Line
8100 3200 7900 3200
Text Label 2500 3400 0 10 ~ 0
DD2
Wire Wire Line
3300 1400 8000 1400
Wire Wire Line
8000 1400 8000 2900
Wire Wire Line
8000 2900 7900 2900
Wire Wire Line
3300 1400 3300 3400
Wire Wire Line
3400 3500 3400 1500
Wire Wire Line
3400 1500 8200 1500
Wire Wire Line
8200 3000 7900 3000
Wire Wire Line
3500 1600 8300 1600
Wire Wire Line
8300 1600 8300 3100
Wire Wire Line
8300 3100 7900 3100
Text Label 1400 3300 0 10 ~ 0
GND
Text Label 3800 3300 0 10 ~ 0
GND
Wire Wire Line
6000 5700 6000 5600
Text Label 6000 5700 0 10 ~ 0
GND
Wire Wire Line
10400 4100 10400 4400
Wire Wire Line
10400 4400 10400 4700
Wire Wire Line
6800 3900 6600 3900
Wire Wire Line
6600 3900 6600 4400
Wire Wire Line
6600 4400 7900 4400
Wire Wire Line
7900 4400 8200 4400
Wire Wire Line
8200 4400 10400 4400
Wire Wire Line
7900 4100 7900 4400
Wire Wire Line
9300 3900 8200 3900
Wire Wire Line
8200 3900 8200 4400
Connection ~ 10400 4400
Connection ~ 7900 4400
Connection ~ 8200 4400
Text Label 10400 4100 0 10 ~ 0
GND
Entry Wire Line
1300 2100 1400 2200
Entry Wire Line
1300 2200 1400 2300
Entry Wire Line
1300 2300 1400 2400
Entry Wire Line
1300 2400 1400 2500
Entry Wire Line
1300 2700 1400 2800
Entry Wire Line
1300 2800 1400 2900
Entry Wire Line
1300 2900 1400 3000
Entry Wire Line
1300 3000 1400 3100
Entry Wire Line
1300 3100 1400 3200
Entry Wire Line
1300 4400 1400 4500
Entry Wire Line
1300 4300 1400 4400
Entry Wire Line
1300 4200 1400 4300
Entry Wire Line
1300 4100 1400 4200
Entry Wire Line
1200 4200 1300 4300
Entry Wire Line
1300 4000 1400 4100
Entry Wire Line
1300 3900 1400 4000
Entry Wire Line
1300 3800 1400 3900
Entry Wire Line
1300 3700 1400 3800
Entry Wire Line
1300 3600 1400 3700
Entry Wire Line
1300 3500 1400 3600
Entry Wire Line
1300 3400 1400 3500
Entry Wire Line
1300 3300 1400 3400
Entry Wire Line
1300 3200 1400 3300
Entry Wire Line
3700 2100 3800 2200
Entry Wire Line
3700 2200 3800 2300
Entry Wire Line
3700 2300 3800 2400
Entry Wire Line
3700 2400 3800 2500
Entry Wire Line
3700 2700 3800 2800
Entry Wire Line
3700 2800 3800 2900
Entry Wire Line
3700 2900 3800 3000
Entry Wire Line
3700 3000 3800 3100
Entry Wire Line
3700 3100 3800 3200
Entry Wire Line
3700 4400 3800 4500
Entry Wire Line
3700 4300 3800 4400
Entry Wire Line
3700 4200 3800 4300
Entry Wire Line
3700 4100 3800 4200
Entry Wire Line
3700 4000 3800 4100
Entry Wire Line
3700 3900 3800 4000
Entry Wire Line
3700 3800 3800 3900
Entry Wire Line
3700 3700 3800 3800
Entry Wire Line
3700 3600 3800 3700
Entry Wire Line
3700 3500 3800 3600
Entry Wire Line
3700 3400 3800 3500
Entry Wire Line
3700 3300 3800 3400
Entry Wire Line
3700 3200 3800 3300
Entry Wire Line
4400 2200 4500 2300
Entry Wire Line
4500 2300 4600 2200
Entry Wire Line
4400 2300 4500 2400
Entry Wire Line
4500 2200 4600 2300
Entry Wire Line
4400 2400 4500 2500
Entry Wire Line
4400 2500 4500 2600
Entry Wire Line
4400 2600 4500 2700
Entry Wire Line
4400 2700 4500 2800
Entry Wire Line
4400 3700 4500 3800
Entry Wire Line
4500 3600 4600 3700
Entry Wire Line
4400 3800 4500 3900
Entry Wire Line
4500 3700 4600 3800
Entry Wire Line
4400 3900 4500 4000
Entry Wire Line
4500 3800 4600 3900
Entry Wire Line
4400 4000 4500 4100
Entry Wire Line
4500 3900 4600 4000
Entry Wire Line
4400 4100 4500 4200
Entry Wire Line
4500 4000 4600 4100
Entry Wire Line
4400 4200 4500 4300
Entry Wire Line
4500 4100 4600 4200
Entry Wire Line
4400 4300 4500 4400
Entry Wire Line
4500 4200 4600 4300
Entry Wire Line
4400 4400 4500 4500
Entry Wire Line
4500 4300 4600 4400
Entry Wire Line
4400 4500 4500 4600
Entry Wire Line
4400 3300 4500 3400
Entry Wire Line
2500 2200 2600 2300
Entry Wire Line
2500 2300 2600 2400
Entry Wire Line
2500 2400 2600 2500
Entry Wire Line
2500 2500 2600 2600
Entry Wire Line
2500 2600 2600 2700
Entry Wire Line
2500 2700 2600 2800
Entry Wire Line
2500 3700 2600 3800
Entry Wire Line
2500 3800 2600 3900
Entry Wire Line
2500 3900 2600 4000
Entry Wire Line
2500 4000 2600 4100
Entry Wire Line
2500 4100 2600 4200
Entry Wire Line
2500 4200 2600 4300
Entry Wire Line
2500 4300 2600 4400
Entry Wire Line
2500 4400 2600 4500
Entry Wire Line
2500 4500 2600 4600
Entry Wire Line
2500 3300 2600 3400
$Comp
L C128-VRAM-64K-Expansion-rescue:MOS8563-C128-VRAM-64K-Expansion-eagle-import IC1
U 1 1 22F7723E
P 1900 3300
F 0 "IC1" H 1525 4475 59 0000 L BNN
F 1 "MOS8563" H 1525 1950 59 0000 L BNN
F 2 "C128-VRAM-64K-Expansion:MOS8563" H 1900 3300 50 0001 C CNN
F 3 "" H 1900 3300 50 0001 C CNN
1 1900 3300
1 0 0 -1
$EndComp
$Comp
L C128-VRAM-64K-Expansion-rescue:DIL48-C128-VRAM-64K-Expansion-eagle-import IC2
U 1 1 BC34DC86
P 4100 3300
F 0 "IC2" H 3925 4475 59 0000 L BNN
F 1 "DIL48" H 3925 1950 59 0000 L BNN
F 2 "C128-VRAM-64K-Expansion:DIL48" H 4100 3300 50 0001 C CNN
F 3 "" H 4100 3300 50 0001 C CNN
1 4100 3300
1 0 0 -1
$EndComp
$Comp
L C128-VRAM-64K-Expansion-rescue:VCC-C128-VRAM-64K-Expansion-eagle-import #SUPPLY01
U 1 1 F54A36B8
P 6000 5100
F 0 "#SUPPLY01" H 6000 5100 50 0001 C CNN
F 1 "VCC" H 5925 5225 59 0000 L BNN
F 2 "" H 6000 5100 50 0001 C CNN
F 3 "" H 6000 5100 50 0001 C CNN
1 6000 5100
1 0 0 -1
$EndComp
$Comp
L C128-VRAM-64K-Expansion-rescue:41464C-C128-VRAM-64K-Expansion-eagle-import IC3
U 1 1 B686635D
P 7300 3400
F 0 "IC3" H 7000 4025 59 0000 L BNN
F 1 "41464C" H 7000 2500 59 0000 L BNN
F 2 "C128-VRAM-64K-Expansion:DIL18" H 7300 3400 50 0001 C CNN
F 3 "" H 7300 3400 50 0001 C CNN
1 7300 3400
1 0 0 -1
$EndComp
$Comp
L C128-VRAM-64K-Expansion-rescue:41464C-C128-VRAM-64K-Expansion-eagle-import IC4
U 1 1 FA55F29D
P 9800 3400
F 0 "IC4" H 9500 4025 59 0000 L BNN
F 1 "41464C" H 9500 2500 59 0000 L BNN
F 2 "C128-VRAM-64K-Expansion:DIL18" H 9800 3400 50 0001 C CNN
F 3 "" H 9800 3400 50 0001 C CNN
1 9800 3400
1 0 0 -1
$EndComp
$Comp
L C128-VRAM-64K-Expansion-rescue:C5_2.5-C128-VRAM-64K-Expansion-eagle-import C1
U 1 1 65963FEF
P 6000 5400
F 0 "C1" H 6060 5415 59 0000 L BNN
F 1 "22nF" H 6060 5215 59 0000 L BNN
F 2 "C128-VRAM-64K-Expansion:C5B2.5" H 6000 5400 50 0001 C CNN
F 3 "" H 6000 5400 50 0001 C CNN
1 6000 5400
1 0 0 -1
$EndComp
$Comp
L C128-VRAM-64K-Expansion-rescue:GND-C128-VRAM-64K-Expansion-eagle-import #GND01
U 1 1 8DA2BB24
P 6000 5800
F 0 "#GND01" H 6000 5800 50 0001 C CNN
F 1 "GND" H 5900 5700 59 0000 L BNN
F 2 "" H 6000 5800 50 0001 C CNN
F 3 "" H 6000 5800 50 0001 C CNN
1 6000 5800
1 0 0 -1
$EndComp
$Comp
L C128-VRAM-64K-Expansion-rescue:GND-C128-VRAM-64K-Expansion-eagle-import #GND02
U 1 1 4877C9E2
P 10400 4800
F 0 "#GND02" H 10400 4800 50 0001 C CNN
F 1 "GND" H 10300 4700 59 0000 L BNN
F 2 "" H 10400 4800 50 0001 C CNN
F 3 "" H 10400 4800 50 0001 C CNN
1 10400 4800
1 0 0 -1
$EndComp
Wire Wire Line
9000 3800 9300 3800
Wire Wire Line
8600 3500 9300 3500
Wire Wire Line
6100 2000 8600 2000
Wire Wire Line
6500 2400 9000 2400
Wire Wire Line
8900 3200 9300 3200
Wire Wire Line
6400 2300 6400 3200
Wire Wire Line
6400 3200 6800 3200
Wire Wire Line
6300 2200 8800 2200
Wire Wire Line
6000 1900 8500 1900
Wire Wire Line
6000 3600 6800 3600
Wire Wire Line
2800 900 10800 900
Wire Wire Line
2500 2900 2900 2900
Wire Wire Line
2500 3000 3000 3000
Wire Wire Line
2500 3100 3100 3100
Wire Wire Line
2500 3200 3200 3200
Wire Wire Line
2500 3500 3400 3500
Wire Wire Line
8200 1500 8200 3000
Wire Wire Line
2500 3600 3500 3600
Wire Wire Line
3500 1600 3500 3600
Text Label 4400 2400 0 10 ~ 0
R
Text Label 4400 2500 0 10 ~ 0
G
Text Label 4400 2600 0 10 ~ 0
B
Text Label 4400 2700 0 10 ~ 0
I
Text Label 6800 4000 0 10 ~ 0
~CAS
Text Label 6800 3900 0 10 ~ 0
~OE
NoConn ~ 4400 2800
NoConn ~ 4400 2900
NoConn ~ 4400 3000
NoConn ~ 4400 3100
NoConn ~ 4400 3200
NoConn ~ 4400 3400
NoConn ~ 4400 3500
NoConn ~ 4400 3600
Text Label 8600 4600 0 50 ~ 0
~CAS
Text Label 8600 4500 0 50 ~ 0
~RAS
Text Label 2650 2900 0 50 ~ 0
DD6
Text Label 2650 3000 0 50 ~ 0
DD5
Text Label 2650 3100 0 50 ~ 0
DD4
Text Label 2650 3200 0 50 ~ 0
DD3
Text Label 2650 2800 0 50 ~ 0
DD7
Text Label 2650 3400 0 50 ~ 0
DD2
Text Label 2650 3500 0 50 ~ 0
DD1
Text Label 2650 3600 0 50 ~ 0
DD0
Text Label 5700 3600 0 50 ~ 0
DA0
Text Label 5700 3500 0 50 ~ 0
DA5
Text Label 5700 3400 0 50 ~ 0
DA3
Text Label 5700 3300 0 50 ~ 0
DA1
Text Label 5700 3200 0 50 ~ 0
DA2
Text Label 5700 3100 0 50 ~ 0
DA4
Text Label 5700 3000 0 50 ~ 0
DA6
Text Label 5700 2900 0 50 ~ 0
DA7
Text Label 8600 4800 0 50 ~ 0
~WE
Text Label 8600 3900 0 50 ~ 0
~OE
Text Label 8600 4400 0 50 ~ 0
GND
NoConn ~ 3800 2600
NoConn ~ 3800 2700
Text Label 7800 1400 0 50 ~ 0
DD2
Text Label 7800 1500 0 50 ~ 0
DD1
Text Label 7800 1600 0 50 ~ 0
DD0
Text Label 7800 1300 0 50 ~ 0
DD3
Text Label 7800 1000 0 50 ~ 0
DD6
Text Label 7800 1100 0 50 ~ 0
DD5
Text Label 7800 1200 0 50 ~ 0
DD4
Text Label 7800 900 0 50 ~ 0
DD7
Wire Wire Line
8100 1300 8100 3200
Wire Wire Line
2500 2800 2800 2800
Wire Wire Line
2500 3400 3300 3400
Wire Bus Line
2600 2200 2600 4700
Wire Bus Line
4500 2200 4500 4700
Wire Bus Line
1300 2000 1300 4500
Wire Bus Line
3700 2000 3700 4500
$EndSCHEMATC

1
Schematic/fp-info-cache Normal file
View File

@@ -0,0 +1 @@
0

3
Schematic/sym-lib-table Normal file
View File

@@ -0,0 +1,3 @@
(sym_lib_table
(lib (name C128-VRAM-64K-Expansion-rescue)(type Legacy)(uri ${KIPRJMOD}/C128-VRAM-64K-Expansion-rescue.lib)(options "")(descr ""))
)